Project 1: Push button to control LED

The Constraints File

After the synthesis step, iCEcube2 will need a constraints file in order to resolve top-level FPGA pins to the design. For the Nandland Go board, the constraints file can be found on the Nandland website, or copy it directly from here:

The constraints file contains the physical pin assignments for the following signals:

• 1 pin for FPGA Clock
• 4 pins for LEDs
• 4 pins for Switches (push buttons)
• 14 pins connect to two 7-segment displays
• 2 pins connect to UART
• 11 pins for VGA Output (HSync, VSync, 3 each for R,G,B)
• 8 pins for PMOD Signals

VHDL Solution

This is a pretty straightforward solution, tying each push-button signal directly to it's corresponding LED:

Solution Files:

project_1.v
project_1.vhd

Workflow in iCEcube2

1. Start a New Project



2. Add source code files



3. Run Synthesis
Synthesis converts the VHDL or Verilog code into physical elements that are available on your particular FPGA. An FPGA has dedicated pieces of logic on it. It has wires, Look-Up Tables, Registers, and Memory. It can have other things, but these are by far the most targeted elements during synthesis.


4. Run Place and Route
Place and Route takes those components and places them on your FPGA. You can think of an FPGA as a large grid of these components. Place and Route will assign which component gets used where. It is a particularly important step of the FPGA build process for designs that use clocks. This is the step where the Constraints file becomes important.


5. Check resources used (when P&R completes)



6. Generate bitstream



7. Use the Diamond Programmer to load the bitstream file onto the FPGA board.

The .bin file is located here: project\project_Implmnt\sbt\outputs\bitmap







8. Test on the actual hardware!

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